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CMOS Technology
DS-IMP offers a wide selection of single/double metal and single/double
poly layer CMOS technologies, down to 0.8-micron feature sizes.
This includes n-well and p-well versions with epitaxial /non-epitaxial
starting materials and custom parameter options for specific
applications.
Low and zero threshold process are available. Poly-to-poly capacitors
are available for analog signal conditioning applications. Operating
voltages range from 1.5V to 120V.
BiCMOS Technology
DS-IMP combines bipolar and CMOS processes into a highly integrated
solution for users requiring the speed of bipolar and low power/high
density of CMOS. BiCMOS product offerings include 5V, 12V, 20V
and 30V processes. High sheet resistance poly (2 Kohms per square)
is available for high-value resistor applications as well as
a low temperature coefficient poly for resistors.
BCD Technology
A versatile 30 volt process that combines the best features
of bipolar, CMOS and DMOS devices is available for automotive,
motor drive, ink jet printers, solenoid control and similar
power management markets. The vertical DMOS device combines
a low (0.8 volt typical) threshold with 30-volt drain-source
breakdown voltage, suitable for “Smart power” applications.
EEPROM and EPROM Technology
Electrically erasable CMOS technology provides programmability
in digital and mixed-signal systems. DS-IMP's EECMOS process
simplifies post-fabrication calibrations and reprogramming for
custom digital and analog logic applications.
Low Voltage Technology
A true low-voltage process has been developed by enhancing DS-IMP's
standard CMOS technology. It is a product of DS-IMP's expertise
in mixed analog and digital CMOS process technology and internal
circuit design need. This process meets 3V power sUpply requirements
and can be used for 1.5V battery-operated IC products. DS-IMP
manufactures integrated disk drive read channel ICs using this
production proven 3V process.
High Voltage Technology
DS_IMP offers a fully-modeled manufacturing process that combines
120-volt CMOS devices with 1.2 micron basic geometries for the
logic section, suitable for electro-luminescent lamps drivers,
LCD panels, etc.
Also available is a 15V, 1.2-micron process that combines the
digital density of a 1.2-micron double metal process with high
voltage drivers through a dual-gate approach. This combination
makes the process attractive for applications such as LCD display
drivers, print-head drivers, peripheral interface circuits,
motor controllers, PWM/SMPS controllers and CCD drivers which
often require large amounts of dense logic on the same chip.
The basic design rule set of a 1.2-micron process applies with
separate rules for the high-voltage section.
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Power Management
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Data Communications |
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Wafer Foundry |
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